This invention relates to field-effect devices and, more particularly, to a "camel gate" FET device and a method of making a camel gate FET device.
Gallium arsenide field-effect transistors for high frequency and large scale integration applications generally employ metal Schottky barrier gates. For high frequency applications, the FETs are designed to operate in the normally-on mode, whereas for LSI applications, normally-off or pseudo-normally-off modes are used. Normally-off or pseudo-normally-off operation is generally achieved by using a very thin channel, which is either depleted or almost depleted by the built-in voltage of the Schottky barrier. The use of a thin channel layer requires that, for good device performance, the buffer layer-channel interface be of high quality. To make the channel conducting and, thus, turn the device on, a forward bias is applied to the gate. The maximum value of this forward bias for satisfactory performance is about 0.6 V. Above this voltage, gate leakage results in a gradual drop in the transconductance and loading of preceding stages.
Unfortunately, there are several problems associated with the use of Schottky barrier gates. Schottky barriers are relatively unreliable, particularly when the operation temperature of the device is high due to either adverse environments or high power dissipation. The metal semiconductor junction presents significant metallurgical difficulties and the built-in junction voltage is difficult to adjust. The maximum forward gate bias of 0.6 V creates several difficulties, including a limitation on the noise margin of the device. In addition, it has been shown that Schottky barriers with acceptable characteristics cannot be obtained on some small bandgap semiconductors, such as indium gallium arsenide, unless a thin tunneling oxide layer is used to enhance the Schottky barrier height. Such an oxide layer naturally introduces additional problems, such as surface states.
It is known that a p/n junction can be used to replace the Schottky gate. This had the advantage of allowing gate voltages of up to 1 V to be applied without any degradation in the transconductance. The associated technology, however, is complicated and the short gate lengths required for high frequency operation are difficult to obtain. Submicron dimensions, though irreproducible and not suitable for LSI, can be obtained using selective etching techniques and by using P (Al,Ga)As in forming the p/n contact. Another disadvantage of this technique is that it requires a metal contact be made to a p-type semiconductor and, consequently, suffers from large gate resistances.
Rectification in the I-V characteristic of an n.sup.+ -n.sup.- structure has been obtained when a very thin p.sup.+ region is introduced between the n.sup.+ and n.sup.- layers (see J. M. Shannon, "A Majority Carrier Camel Diode", Appl. Phys. Lett., Vol. 35, pp. 63-65 (1979). This structure is now known as the "camel diode." Variations of this structure utilizing the advantages of MBE have also been fabricated and shown to have rectifying characteristics. It has also been shown that under forward bias these structures operate as majority carrier devices, not as minority carrier devices as in conventional p-n junction diodes.
It is among the objects of the present invention to provide a field effect transistor device and fabrication method which overcomes the stated disadvantages and other disadvantages of prior art devices and methods.